2001

J. Becker, N. Liebau, T. Pionteck, and M. Glesner.
Efficient Mapping of pre-synthesized IP Cores onto Dynamically Reconfigurable Array Architectures.
In 11th International Conference on Field Programmable Logic and Applications, 2001.
J. Becker, T. Pionteck, and M. Glesner.
Adaptive Systems-on-Chip: Architectures and Technologies and Applications.
In 14th Symposium on Integrated Circuits and Systems Design, 2001.
J. Becker, T. Pionteck, and M. Glesner.
Effiziente IP-basiert Abbildungsverfahren fr dynamisch rekonfigurierbare Array-Architekturen.
In 10. E.I.S.-Workshop, Entwurf Integrierter Schaltungen und Systeme, 2001.
J. Becker, T. Pionteck, and M. Glesner.
Simulation, Prototyping and Reconfigurable Hardware Realization of CDMA RAKE-Receiver Algorithms for Flexible Mobile Transceivers.
In Engineering of Reconfigurable Systems and Algorithms (ERSA'01), 2001.
J. Becker, T. Pionteck, C. Habermann, and M. Glesner.
Design and Implementation of a Coarse-Grained Dynamically Reconfigurable Hardware Architecture.
In Workshop on VLSI (WVLSI), 2001.
A. Garcia Ortiz and M. Glesner.
Average bit transition activity for non zero-mean signals in DSP architectures.
In International Symposium on Signals, Circuits and Systems, 2001.
T. Hollstein, Z. Peng, R. Ubar, and M. Glesner.
Challenges for Future System-on-Chip Design.
In European Conference on Circuit Theory and Design, 2001.
L. Indrusiak, J. Becker, M. Glesner, and R. Reis.
Distributed Collaborative Design over Cave2 Framework.
In 11th IFIP International Conference on Very Large Integration, 2001.
L. Indrusiak, B. Hernandez, S. Sawicki, R. Reis, J. Becker, and M. Glesner.
Distributed System-Level Design Using Pair-Programming over Cave.
In DATE University Booth – Design Automation and Test in Europe, 2001.
L. Kabulepa, M. Glesner, and T. Kella.
Finite-precision analysis of an OFDM burst synchronization scheme.
In Global Telecommunications Conference – GLOBECOM '01, 2001.
L. Kabulepa, T. Kella, and M. Glesner.
Lower bound on the accuracy of the CORDIC-based frequency offset compensation in burst oriented OFDM systems.
In Vehicular Technology Conference – VTC, 2001.
L. Kabulepa, T. Kella, T. Pionteck, R. Ludewig, J. Becker, J. Plechinger, and M. Glesner.
On the numerical accuracy of CORDIC-based frequency offset compensation in burst oriented OFDM systems.
In The 8th IEEE International Conference on Electronics, Circuits and Systems – ICECS, 2001.
O. Mitrea and M. Glesner.
Inductor Source Degeneration 2.4GHz CMOS Low Noise Amplifier Design.
In Poceedings of Kleinheubacher Tagung 2001, 2001.
O. Mitrea, J. Ocampo Hidalgo, L. Kabulepa, T. Hollstein, and M. Glesner.
Trends and Challenges for the Design of Integrated Microelectronic Communication Systems.
In Thema Forschung 1/2001, 2001.
J. Mades, T. Schneider, A. Windisch, M. Glesner, D. Monjau, and W. Ecker.
CANGURU- A Combined ANalag Mixed-Signal and Multi-LanGUage Research SimUlator.
In In Demonstrations at the University Booth of the DATE Conference, 2001.
J. Mades, T. Schneider, A. Windisch, T. Hollstein, J. Becker, and M. Glesner.
Concept of a Joined University/Industry Course for Mixed-Signal System-on-Chip Design.
In Proceedings of the 2001 International Conference on Microelectronic Systems Education, 2001.
J. Ocampo Hidalgo, A. Garcia Ortiz, L. Kabulepa, and M. Glesner.
Robustness Against Circuit Nonidealities: Comparative Study of Bandpass Sigma-Delta Modulators.
In Proc. of the Kleinheubacher Tagung 2001, 2001.
T. Schneider, J. Mades, A. Windisch, T. Hollstein, M. Glesner, and T. Kruse.
Eine WEB-Basierte Simulationsumgebung fuer VHDL-AMS.
In ITG/GI/GMM-Workshop „Entwurf Integrierter Schaltungen“, EIS 2001, 2001.
W. Szczesniak, B. Voss, M. Theisen, J. Becker, and M. Glesner.
Influence of high-level synthesis on average and peak temperatures of CMOS circuits.
In Elsevier Microelectronics Journal, 32(10-11), 2001.
M. Sporer, A. Windisch, E. Ziegler, D. Monjau, T. Schneider, J. Mades, C. Grimm, and P. Oehler.
RODOS – Reuse Oriented Design of Embedded Systems.
In Demonstrations at the University Booth of the DATE Conference 2001, 2001.
M. Theisen, A. Garcia Ortiz, B. Voss, J. Becker, and M. Glesner.
Entwurfsmethoden zur Reduktion der Verlustleistung in Mikroelektronischen Systemen fr mobile Anwendungen.
In In Thema Forschung, 1/2001, 2001.
M. Theisen, B. Voss, and M. Glesner.
Transformierende Synthese zur Verlustleistungsreduktion mittels Partitionierung.
In 4. GI/ITG/GMM-Workshop: Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen, 2001.
B. Voss and M. Glesner.
A Low Power Sinusoidal Clocks.
In Proceedings of ISCAS 2001, 2001.
B. Voss, C. Schlachta, and M. Glesner.
Einsatzm�lichkeiten resonanten Umladens als Schaltungstechnik zur Verlustleistungsreduktion in digitalen CMOS-Schaltungen.
In Kleinheubacher Berichte, 2001.
Windisch, D. Monjau, T. Schneider, J. Mades, M. Glesner, and W. Ecker.
A VHDL-Centric Mixed-Language Simulation Environment.
In System-On-Chip Methodologies and Design Languages, 2001.