A. Alsolaim, J. Becker, M. Glesner, and J. Starzyk. A Dynamically Reconfigurable System-on-Chip Architecture for Future Mobile Digital Signal Processing. In Proc. of X European Signal Processing Conference (EUSIPCO 2000), 2000. |
A. Alsolaim, J. Becker, M. Glesner, and J. Starzyk. Architecture and Application of a Dynamically Reconfigurable Hardware Array for Future Mobile Communication Systems. In Proc. of IEEE Symposium of Field-Programmable Custom Computing Machines (FCCM'00), 2000. |
J. Becker and M. Glesner. A Parallel Dynamically Reconfigurable Architecture Designed for Application-specific Hardware/Software Systems in Future Mobile Communication. In The Journal of Supercomputing, Kluwer Academic Publishers, 2000. |
J. Becker and M. Glesner. Object-oriented Specification and IP-based Synthesis of Flexible Hardware/Software Systems-on-a-Chip. In Proceedings of Design and Diagnostics of Electronic Circuits and Systems Workshop, 2000. |
J. Becker, M. Glesner, A. Alsolaim, and J. Starzyk. Fast Communication Mechanisms in Coarse-grained Dynamically Reconfigurable Array Architectures. In Proc. of Second Int'l. Workshop on Engineering of Reconfigurable Hardware/Software Objects (ENREGLE'00, in conjunction with PDPTA 2000), 2000. |
J. Becker, L. Kabulepa, F.-M. Renner, and M. Glesner. Simulation and Rapid Prototyping of Flexible Systems-on-a-Chip for Future Mobile Communication Applications. In Proc. of the 11th Int. Workshop on Rapid System Prototyping, 2000. |
J. Becker, U. Mayer, M. Glesner, L. Soares Indrusiak, and R. Reis. Providing Flexible Internet-Infrastructure for FPGA-Based CAD Courses. In Proc. of the 3rd European Workshop on Microelectronics Education (EWME 2000), 2000. |
J. Becker, T. Pionteck, and M. Glesner. An Application-tailored Dynamically Reconfigurable Hardware Architecture for Digital Baseband Processing. In Proc. of XIII Brazilian Symposium on Integrated Circuit Design (XIII SBCCI, Chip In The Jungle), 2000. |
J. Becker, T. Pionteck, and M. Glesner. Dynamisch rekonfigurierbare Hardwarearchitekturen für flexible System-on-Chip Lösungen in der Mobilkommunikation. In Proceedings of Dresdner Arbeitstagung Schaltungs- und Systementwurf (DASS'2000), 2000. |
J. Becker, T. Pionteck, and M.Glesner. DReAM: A Dynamically Reconfigurable Architecture for Future Mobile Communication Applications. In Proc. of the 10th International Conference on Field Programmable Logic and Applications, 2000. |
M. Glesner, J. Becker, and T. Pionteck. Future Research and Application and Education perspectives of Complex Systems-on-Chip (SoC). In Proceedings of Baltic Electronics Conference (BEC'00), 2000. |
M. Glesner, A. Kirschbaum, F.-M. Renner, and B. Voss. State-of-the-Art in Rapid Prototyping for Mechatronic Systems. In Proc. of 1st IFAC-Conference on Mechatronics Systems, 2000. |
M. Glesner, F. M. Renner, B. Voss, T. Le, and T. Hollstein. Rapid-Prototyping eingebetteter mikroelektronischer Systeme für die Mechatronik. In Thema Forschung, Nr. 1, 2000. |
L. Kabulepa and M. Glesner. Design of Random Number Generators for the HIPERLAN/1 Channel Access Mechanism. In Proc. of the 7th IEEE International Conference on Electronics, Circuits and Systems, 2000. |
L. Kabulepa, B. Voss, and M. Glesner. A Case Study in VLSI Design for Communications: Design of a Pipelined Adaptive DFE for GMSK over Indoor Radio Channels. In Proc. of the 3rd European Workshop on Microelectronics Education (EWME 2000), 2000. |
H. Lohrberg, B. Voss, B. Stoffel, and M. Glesner. Impeller Integrated Measurement of Cavitation Erosive Aggressiveness. In Proc. 1st IFAC Conference on Mechatronic Systems, 2000. |
U. Mayer, J. Deicke, and M. Glesner. Estimation of Multiplexer-Introduced Loss for MPEG-4 Data Streams Connected to (R)CBR Channels. In Proc. of the Fifth IEEE International Symposium on Computers and Communication, 2000. |
U. Mayer, J. Deicke, and M. Glesner. Statistical Modelling of the MPEG-4 FlexMux. In In Proc. of the IEEE International Symposium on Circuits and Systems, 2000. |
U. Mayer and M. Glesner. Hardware Accelerated Estimation of Multiplexer-Introduced Loss for MPEG-4 Data Streams. In Proc. of the 11th IEEE International Workshop on Rapid System Prototyping, 2000. |
U. Mayer and M. Glesner. Network Bandwidth Allocation Optimization for the Transmission of MPEG-4 Data Streams. In Proc. of the Seventh Baltic Electronics Conference, Tallin, Estonia, 2000. |
O. Mitrea, M. Glesner, J. Becker, L. Kabulepa, and B. Voss. Systems-on-a-Chip Design and Application Perspectives in Future Mobile Radio Communications. In Proc. of the 7th International Conference on Optimization of Electrical and electronic Equipment – OPTIM2000, 2000. |
U. Mayer, L. Soares Indrusiak, J. Becker, T. Hollstein, R. Reis, and M. Glesner. An Internet-Capable CAD Suite for the Mulit-Level Design of Complex Microelectronic Systems. In Proc. of Design, Automation and Test In Europe Conference, 2000. |
J. Mades, T. Schneider, A. Windisch, and W. Ecker. Elaboration of Hierarchical VHDL-AMS Models for Mixed-Signal Simulation. In International HDL Conference and Exhibition (HDLCON), 2000. |
J. Ocampo Hidalgo, L. D. Kabulepa, and M. Glesner. On the Impact of OTA Architectures over the Performance of a Bandpass Sigma-Delta Modulator. In Proceedings of the VDE-ITG Diskussionssitzung „Messtechnische Charakterisierung der AD/DA-Umsetzung“, 2000. |
M. Rychetsky, K. Ackermann, and M. Glesner. A Multi-scale Support Vector Algortihm for Classification. In ITG Tagung: Fachgruppe maschinelles Lernen, 2000. |
F.-M. Renner, J. Becker, and M. Glesner. Automated Communication Synthesis for Architecture-precise Rapid Prototyping of Real-time Embedded Systems. In Proc. of the 11th Int. Workshop on Rapid System Prototyping, 2000. |
F.-M. Renner, J. Becker, and M. Glesner. Communication Performance Estimation and Communication Synthesis for Architecture precise Prototyping of Real-time Embedded Systems. In GMM/ITG/GI-Workshop: Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen, 2000. |
F.-M. Renner, J. Becker, and M. Glesner. Communication Performance Models for Architecture-precise Prototyping of Real-Time Embedded Systems. In International Journal of Design Automation for Embedded Systems, 2000. |
F.-M. Renner, J. Becker, and M. Glesner. Field Programmable Communication Emulation and Optimization for Embedded System Design. In Proc. of the 10th International Conference on Field Programmable Logic and Applications, 2000. |
F.-M. Renner and M. Glesner. Modelling, Generation and Optimization of Communication Structures for Architecture-precise Prototyping of Real-Time Embedded Systems. In Ph.D Forum at the 37th IEEE/ACM Design Automation Conference (DAC), 2000. |
F.-M. Renner, K.-J. Hoffmann, M. Markert, and M. Glesner. Design Methodology of Application Specific Integrated Circuits for Mechatronic Systems. In Int. Journal of Microprocessors and Microsystems, Vol. 24, Nr. 2, 2000. |
M. Rychetsky, J. Shawe-Taylor, and M. Glesner. Direct Bayes Point Machines. In International Conference on Machine Learning, 2000. |
T. Schneider, J. Mades, A. Windisch, M. Glesner, and W. Ecker. An Open VHDL-AMS Simulation Framework. In 2000 IEEE/ACM International Workshop on Behavioral Modeling and Simulation (BMAS 2000), 2000. |
T. Schneider, J. Mades, A. Windisch, M. Glesner, and W. Ecker. Anatomy of a VHDL-AMS Environment. In Forum on Design Languages (FDL), 2000. |
T. Schneider, J. Mades, A. Windisch, M. Glesner, D. Monjau, and W. Ecker. A System-Level Simulation Environment for System-On-Chip Design. In Proc. of 13th Annual IEEE International ASIC/SOC Conference, 2000. |
M. Theisen, J. Becker, and M. Glesner. Bezüglich Fläche, Zeit und Verlustleistung optimierende und parallelisierende Schleifentransformationen in der High-Level-Synthese. In Informatiktage 2000, 2000. |
M. Theisen, F.C. Gärtner, and M. Glesner. Correctness Preserving Transformations for the Design of Parallelized Low-Power Systems. In Informatik 2000, 2000. |
M. Theisen, B. Voss, J. Becker, and M. Glesner. Die Wavefront- und die Tiling-Transformation zum Entwurf von verlustleistungsarmen Systemen. In Proc. of ITG Workshop: Mikroelektronik für die Informationstechnik, 2000. |
B. Voss and M. Glesner. A Low Power Approach for Busses Using Adiabatic Charging. In Proc. of the 7th Conference on Electronics and Microsystem Technology – Baltic Electronics Conference (BEC), 2000. |
B. Voss and M. Glesner. Adiabatic Charging of Long Interconnects. In Proc. of the 7th IEEE International Conference on Electronics, Circuits and Systems, 2000. |
B. Voss and M. Glesner. Untersuchung adiabatischer Prinzipien hinsichtlich ihrer Anwendbarke it in digitalen Schaltungen. In Proc. ITG Workshop Mikroelektronik für die Informationstechnik, 2000. |
B. Voss, M. Glesner, H. Lohrberg, and Bernd Stoffel. Wireless Energy and Data Transmission for Impeller Integrated Measurement of Erosive Aggressiveness. In Proceedings of the 2000 IEEJ International Analog VLSI Workshop, 2000. |
B. Voss, L. Kabulepa, and M. Glesner. Teaching Advanced Circuit Design Techniques. In In Proceedings of the 3rd European Workshop on Microelectronics Education, 2000. |